A programmable processing device can be programmed to handle dozens of data acquisition channels and analog or digital inputs. A programmable processing device typically includes a central processing unit (CPU) and several programmable digital blocks organized as a linear array. The digital peripheral functions of varying length can be mapped to one or more the programmable digital blocks.
Each programmable digital block in a linear array of blocks is assigned with either an even or odd memory address. If the width of the programmable digital block is the same as the width of the digital peripheral function to be mapped, for example, 8 bits wide, the digital peripheral function can be mapped to any programmable digital block with either even or odd memory address. Accordingly, the width of the mapped digital peripheral function is aligned with the address of the programmable digital block, which makes the CPU to be able to access the mapped digital peripheral function in one cycle via a system bus.
However, when the width of the digital peripheral function to be mapped is wider than the width of the programmable digital block, for example, the digital peripheral function is 16 bits wide and the programmable digital block is 8 bits wide, two programmable digital blocks are required to map the function. There are two ways the digital peripheral function can be mapped into the linear array programmable digital block: 1) map the digital peripheral function to one or more programmable digital blocks starting with a programmable digital block having an even memory address; or 2) map the digital peripheral function to one or more programmable digital blocks starting with a programmable digital block having an odd memory address. The first way of mapping has the advantage that the CPU will be able to access the mapped function in one cycle, since it is an aligned access, but it will result in wasted resources because it means that a 16-bit function can never be mapped to start with a programmable digital block with an odd memory address. The second way has the advantage that the function can be mapped to start in any block, but it will force the CPU to break up the access to the mapped digital peripheral function into multiple access cycles at aligned boundaries, which complicates the interaction between the peripheral and the CPU.